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Please use this identifier to cite or link to this item: http://dspace.aiub.edu:8080/jspui/handle/123456789/434
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dc.contributor.authorBhuyan, Muhibul Haque-
dc.contributor.authorIslam, Md. Tariqul-
dc.date.accessioned2022-04-25T15:00:17Z-
dc.date.available2022-04-25T15:00:17Z-
dc.date.issued2022-02-28-
dc.identifier.citationM. H. Bhuyan and M. T. Islam, “Study of an n-MOSFET by Designing at 100 nm and Simulating using SILVACO ATLAS Simulator,” IOSR Journal of VLSI and Signal Processing (IOSR-JVSP), IF=2.82, ISSN: e-2319-4200, p-2319-4197, vol. 12, issue 1, January-February 2022, pp. 7-15.en_US
dc.identifier.issne-2319-4200, p-2319-4197-
dc.identifier.urihttp://dspace.aiub.edu:8080/jspui/handle/123456789/434-
dc.descriptionThis is the student research completed under my supervision at SEU.en_US
dc.description.abstractIn this paper, the design steps of an n-MOSFET have been described and then the electrical characterization of this MOSFET is simulated at 100 nm by using the SILVACO ATLAS software, which is a process and device simulation software tool. The MOS device is virtually fabricated using ATHENA in SILVACO and simulations have been performed with help of ATLAS software, and all graphs are plotted using TONYPLOT in the SILVACO. The simulated results are then analyzed to study the n-MOSFET device’s mesh structure, transfer and output characteristics of the same, doping and carrier concentration plot, etc. From the simulation study, we found that the designed device is working well for various bias conditions.en_US
dc.description.sponsorshipSelfen_US
dc.language.isoen_USen_US
dc.publisherIOSRen_US
dc.relation.ispartofseriesI;2-
dc.subjectMOSFETen_US
dc.subjectSILVACOen_US
dc.subjectDevice Designen_US
dc.subjectDeviceen_US
dc.subjectATLASen_US
dc.subjectSimulationen_US
dc.titleStudy of an n-MOSFET by Designing at 100 nm and Simulating using SILVACO ATLAS Simulatoren_US
dc.typeArticleen_US
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