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dc.contributor.authorBhuyan, Muhibul Haque-
dc.date.accessioned2022-08-21T10:13:15Z-
dc.date.available2022-08-21T10:13:15Z-
dc.date.issued2007-12-31-
dc.identifier.citationM. H. Bhuyan, “Finite State Machine Based Directional Counter Design Using VHDL,” Journal of Bangladesh Electronics Society, ISSN: p-1816-1510, vol. 7, no 1-2, pp. 45-53, June-Dec. 2007.en_US
dc.identifier.issnp-1816-1510-
dc.identifier.urihttp://dspace.aiub.edu:8080/jspui/handle/123456789/682-
dc.descriptionThis is individual research work.en_US
dc.description.abstractIn this work, a directional counter circuit is designed using a light source and light sensor, up-down counter, timer, and a logic circuit to sense the direction of movement of objects and to count the number of objects passing through a gate. A finite-state machine-based approach is adopted for this design. Each step of the design is described with a state diagram, state table, state-assigned table, 'K-maps', Boolean expressions, and logic circuit diagram. Finally, the logic circuit was simulated in VHDL for different test patterns to verify the designed circuit. It is found that the circuit works properly for all conditions.en_US
dc.description.sponsorshipSelf-funded.en_US
dc.language.isoen_USen_US
dc.publisherBangladesh Electronics and Informatics Societyen_US
dc.subjectFinite State Machineen_US
dc.subjectDirectional Counteren_US
dc.subjectFPGAen_US
dc.subjectSimulationen_US
dc.subjectVHDLen_US
dc.subjectLogic Circuit Designen_US
dc.titleFinite State Machine Based Directional Counter Design Using VHDLen_US
dc.typeArticleen_US
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