Linear Pocket Profile Based Pinch Off Voltage Model for Nano Scale n-MOSFET

Abstract

This paper focuses on developing an analytical pinch-off voltage model for the pocket implanted nano scale n-MOSFETs based on symmetric linear pocket profiles both at the source and drain sides under the gate of the device. Straight line approximated equation is used to simulate the pocket profiles along the gate length at the surface of the MOS device. The effective doping concentration is derived for the whole gate length and is incorporated in the pinch-off voltage model that is obtained from the strong inversion charge expression at the surface. Then the pinch-off voltage is simulated for various drain and gate biases as well as for various device parameters. To observe the model validity, drain current vs. drain voltage curve is plotted for various gate biases by incorporating this pinch-off voltage model. The simulation results approve that the developed pinch-off voltage model can be used to study and characterize the pocket implanted advanced ULSI devices.