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DC Field | Value | Language |
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dc.contributor.author | Sadid Muneer, Muhammad Aminul Haque Chowdhury, Md. Kabiruzzaman, Shafat Shahnewaz, Nafisa Noor, and Mainul Hossain | - |
dc.date.accessioned | 2024-09-25T05:45:06Z | - |
dc.date.available | 2024-09-25T05:45:06Z | - |
dc.date.issued | 2024-06-18 | - |
dc.identifier.uri | http://dspace.aiub.edu:8080/jspui/handle/123456789/2443 | - |
dc.description.abstract | Phase change memory (PCM) is one of the most promising nonvolatile memory technologies for high-density, high-endurance, fast-switching, and multilevel data storage. However, the high RESET current requirement remains a critical bottleneck in the development of PCM technology. In this work, we propose a pillar-shaped PCM device that consists of a Ge2Sb2Te5 (GST) layer sandwiched between the top and the bottom TiN electrodes. An atomically thin layer of MoS2 is grown on top of the oxidized bottom TiN layer. A filament formed through the TiO2 and MoS2 layers enables electrical conduction, while the high thermal resistivity of MoS2 ensures excellent thermal confinement within the GST layer. Finite element simulations show a 91% reduction in RESET current brought about by the filament, while the use of MoS2 yields a further ∼30% decrease in the switching power. The results presented here demonstrate the potential use of two-dimensional (2D) materials with conventional PCM cells to reduce switching power. | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | ACS | en_US |
dc.subject | Filaments Layers Melting Oxides Thermodynamic modeling | en_US |
dc.title | Thermal Confinement by Monolayer MoS2 for Reduced RESET Current in Phase Change Memory Pillar Cells | en_US |
dc.type | Article | en_US |
Appears in Collections: | Publications From Faculty of Engineering |
Files in This Item:
File | Description | Size | Format | |
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Dr Kabiruzzaman_ACS_2024.docx | 3.79 MB | Microsoft Word XML | View/Open |
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