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dc.contributor.authorRahman, Md. Lutfor-
dc.contributor.authorBhuyan, Muhibul Haque-
dc.date.accessioned2022-08-30T10:24:11Z-
dc.date.available2022-08-30T10:24:11Z-
dc.date.issued2010-06-02-
dc.identifier.citationM. L. Rahman and M. H. Bhuyan, “Design and Optimization of VCO PLL Frequency Synthesizer,” Proceedings of the National Conference on Electronics and Telecommunications for Digital Bangladesh organized by the Bangladesh Electronics Society, Dhaka, 2-3 June 2010, pp. 227-232.en_US
dc.identifier.urihttp://dspace.aiub.edu:8080/jspui/handle/123456789/785-
dc.descriptionPG Student thesis worken_US
dc.description.abstractToday's mobile communications systems demand higher communication quality, higher data rates, higher frequency of operation, more channels per unit bandwidth, low power consumption, and smaller size. All these constraints combine to make the whole design of the communication systems including components selections and evaluation quite challenging. One portion of this design is the synthesized oscillator. Typically, synthesized oscillators combine a Voltage-Controlled Oscillator (VCO) with a Phase-Locked Loop (PLL) IC, frequency reference (e.g., Crystal/TCXO), and a loop filter. This paper describes the evaluation of the PLL and VCO and relates those evaluations to information that will allow the circuit designer to optimize the whole oscillator design including the loop filter. Few experimental results are also presented. It is found that the designed circuit works very well.en_US
dc.description.sponsorshipSelf-fundeden_US
dc.language.isoen_USen_US
dc.publisherBangladesh Electronics and Informatics Societyen_US
dc.subjectVCOen_US
dc.subjectPLLen_US
dc.subjectFrequency Synthesizeren_US
dc.subjectDesign and Optimizationen_US
dc.titleDesign and Optimization of VCO PLL Frequency Synthesizeren_US
dc.typeArticleen_US
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