Please use this identifier to cite or link to this item: http://dspace.aiub.edu:8080/jspui/handle/123456789/2057
Title: Design of a Multipurpose Ternary Arithmetic Circuit Using CNTFET
Authors: Jameel, Kazi Muhammad
Mannan, Mohammad Abdul
Hasan, Md. Tanvir
Keywords: Ternary arithmetic circuits
ternary full adder
TFA
ternary full subtractor
TFS
Issue Date: 2016
Publisher: STM Journals, an imprint of CELNET (Consortium e-Learning Network Pvt. Ltd.)
Citation: Kazi Muhammad Jameel, Mohammad Abdul Mannan, Md. Tanvir Hasan, “Design of a Multipurpose Ternary Arithmetic Circuit Using CNTFET”, Journal of Semiconductor Devices and Circuits (STM Journals), Vol. 3, Issue 1, pp. 13-24, 2016.
Abstract: In this paper, a multipurpose ternary arithmetic circuit is presented for ternary processors based on carbon nanotube field effect transistors (CNTFETs). Both addition and subtraction can be performed using same circuit’s configuration, which is the special feature of the proposed circuit. The combination of pseudo and complimentary logic structure are employed to blend the binary and ternary logic techniques. The propagation delay and power delay product are 139.5 pico second and 3.18 femto Joule, which indicates significant improvement in power consumption, delay and PDP, compared to few recent ternary full adder designs.
URI: http://dspace.aiub.edu:8080/jspui/handle/123456789/2057
ISSN: 2455-3379
Appears in Collections:Publications From Faculty of Engineering

Files in This Item:
File Description SizeFormat 
48J_Mannan_JoSDC_STM.pdf180.27 kBAdobe PDFView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.