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dc.contributor.authorBhuyan, Muhibul Haque-
dc.contributor.authorKhosru, Quazi Deen Mohd-
dc.date.accessioned2022-08-21T10:18:36Z-
dc.date.available2022-08-21T10:18:36Z-
dc.date.issued2010-08-31-
dc.identifier.citationM. H. Bhuyan and Q. D. M. Khosru, “Linear Pocket Profile Based Threshold Voltage Model for Sub-100 nm n-MOSFET,” International Journal of Electronics and Communication Engineering, p: 2010-376X, e: 2010-3778, vol. 4, no. 8, 2010, pp. 1187-1192.en_US
dc.identifier.issnp: 2010-376X, e: 2010-3778-
dc.identifier.urihttp://dspace.aiub.edu:8080/jspui/handle/123456789/692-
dc.descriptionThis is based on my PhD worken_US
dc.description.abstractThis paper presents a threshold voltage model of pocket implanted sub-100 nm n-MOSFETs incorporating the drain and substrate bias effects using two linear pocket profiles. Two linear equations are used to simulate the pocket profiles along the channel at the surface from the source and drain edges towards the center of the n-MOSFET. Then the effective doping concentration is derived and is used in the threshold voltage equation that is obtained by solving the Poisson-s equation in the depletion region at the surface. Simulated threshold voltages for various gate lengths fit well with the experimental data already published in the literature. The simulated result is compared with the two other pocket profiles used to derive the threshold voltage models of n-MOSFETs. The comparison shows that the linear model has a simple compact form that can be utilized to study and characterize the pocket implanted advanced ULSI devices.en_US
dc.description.sponsorshipSelf-fundeden_US
dc.language.isoen_USen_US
dc.publisherWorld Academy of Science, Engineering, and Technologyen_US
dc.relation.ispartofseries;3-
dc.subjectn-MOSFETen_US
dc.subjectLinear Pocket Profileen_US
dc.subjectPocket Implanten_US
dc.subjectThreshold Voltageen_US
dc.subjectShort Channel Effect (SCE)en_US
dc.subjectReverse Short Channel Effect (RSCE).en_US
dc.titleLinear Pocket Profile Based Threshold Voltage Model for Sub-100 nm n-MOSFETen_US
dc.typeArticleen_US
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