Please use this identifier to cite or link to this item:
http://dspace.aiub.edu:8080/jspui/handle/123456789/692
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Bhuyan, Muhibul Haque | - |
dc.contributor.author | Khosru, Quazi Deen Mohd | - |
dc.date.accessioned | 2022-08-21T10:18:36Z | - |
dc.date.available | 2022-08-21T10:18:36Z | - |
dc.date.issued | 2010-08-31 | - |
dc.identifier.citation | M. H. Bhuyan and Q. D. M. Khosru, “Linear Pocket Profile Based Threshold Voltage Model for Sub-100 nm n-MOSFET,” International Journal of Electronics and Communication Engineering, p: 2010-376X, e: 2010-3778, vol. 4, no. 8, 2010, pp. 1187-1192. | en_US |
dc.identifier.issn | p: 2010-376X, e: 2010-3778 | - |
dc.identifier.uri | http://dspace.aiub.edu:8080/jspui/handle/123456789/692 | - |
dc.description | This is based on my PhD work | en_US |
dc.description.abstract | This paper presents a threshold voltage model of pocket implanted sub-100 nm n-MOSFETs incorporating the drain and substrate bias effects using two linear pocket profiles. Two linear equations are used to simulate the pocket profiles along the channel at the surface from the source and drain edges towards the center of the n-MOSFET. Then the effective doping concentration is derived and is used in the threshold voltage equation that is obtained by solving the Poisson-s equation in the depletion region at the surface. Simulated threshold voltages for various gate lengths fit well with the experimental data already published in the literature. The simulated result is compared with the two other pocket profiles used to derive the threshold voltage models of n-MOSFETs. The comparison shows that the linear model has a simple compact form that can be utilized to study and characterize the pocket implanted advanced ULSI devices. | en_US |
dc.description.sponsorship | Self-funded | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | World Academy of Science, Engineering, and Technology | en_US |
dc.relation.ispartofseries | ;3 | - |
dc.subject | n-MOSFET | en_US |
dc.subject | Linear Pocket Profile | en_US |
dc.subject | Pocket Implant | en_US |
dc.subject | Threshold Voltage | en_US |
dc.subject | Short Channel Effect (SCE) | en_US |
dc.subject | Reverse Short Channel Effect (RSCE). | en_US |
dc.title | Linear Pocket Profile Based Threshold Voltage Model for Sub-100 nm n-MOSFET | en_US |
dc.type | Article | en_US |
Appears in Collections: | Publications From Faculty of Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
Draft_DSpace_Publication_Info_Upload_FE_Prof Muhibul IJECE Vth.docx | 2.93 MB | Microsoft Word XML | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.