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Title: | Design and Optimization of VCO PLL Frequency Synthesizer |
Authors: | Rahman, Md. Lutfor Bhuyan, Muhibul Haque |
Keywords: | VCO PLL Frequency Synthesizer Design and Optimization |
Issue Date: | 2-Jun-2010 |
Publisher: | Bangladesh Electronics and Informatics Society |
Citation: | M. L. Rahman and M. H. Bhuyan, “Design and Optimization of VCO PLL Frequency Synthesizer,” Proceedings of the National Conference on Electronics and Telecommunications for Digital Bangladesh organized by the Bangladesh Electronics Society, Dhaka, 2-3 June 2010, pp. 227-232. |
Abstract: | Today's mobile communications systems demand higher communication quality, higher data rates, higher frequency of operation, more channels per unit bandwidth, low power consumption, and smaller size. All these constraints combine to make the whole design of the communication systems including components selections and evaluation quite challenging. One portion of this design is the synthesized oscillator. Typically, synthesized oscillators combine a Voltage-Controlled Oscillator (VCO) with a Phase-Locked Loop (PLL) IC, frequency reference (e.g., Crystal/TCXO), and a loop filter. This paper describes the evaluation of the PLL and VCO and relates those evaluations to information that will allow the circuit designer to optimize the whole oscillator design including the loop filter. Few experimental results are also presented. It is found that the designed circuit works very well. |
Description: | PG Student thesis work |
URI: | http://dspace.aiub.edu:8080/jspui/handle/123456789/785 |
Appears in Collections: | Publications From Faculty of Engineering |
Files in This Item:
File | Description | Size | Format | |
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Draft_DSpace_Publication_Info_Upload_FE_Prof Muhibul BEIS PLL.docx | 3.34 MB | Microsoft Word XML | View/Open |
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