Design and Simulation of a 4:1 Multiplexer in Microwind and DSch using 90 nm CMOS Technology

Abstract

Now a day, low power and low energy have become an important issue in consumer electronics and it is necessary to do research in combinational circuits. One of the important elements in digital circuits is a multiplexer or data selector for processing multiple inputs with a single output. At present, multiplexers have become a universal logic circuit used to design other combinational logic circuits or digital systems. Therefore, now attention is being given to design or revise the design of a multiplexer topology so that the power consumption and area occupancy become low and at the same time speed becomes high. In this paper, Complementary Metal Oxide Semiconductor (CMOS) logic-based 4:1 multiplexer has been designed, simulated and analyzed in terms of its performance at the transistor level using CAD tools of DSch and Microwind.