Linear Asymmetric Pocket Profile Based Threshold Voltage Model for Nano Scale n-MOSFET

Abstract

This paper presents an analytical threshold voltage model of the pocket implanted nanoscale n-MOSFETs incorporating the drain and substrate bias effects using an asymmetric linear pocket profile at the source side of the device. A linear equation is used to simulate the pocket profile along the channel at the surface from the source edge toward the center of the n-MOSFET. Then the effective doping concentration is derived and is used in the threshold voltage equation that is obtained by solving Poisson's equation in the depletion region at the surface. Threshold voltages are simulated for various gate lengths, pocket lengths, peak pocket doping concentrations, oxide thicknesses as well as for various bias conditions. The results show that the proposed threshold voltage model with a linear pocket profile can be utilized to study and characterize the pocket implanted advanced ULSI devices.